August Ends..!!

 It's been a while since I've written on my blog...Got myself busy with the last year of graduation and having fun with all mates.Final year is really rocking and i do fear at times that i may miss them, in the near future.Lets hope for the best...

      Writing blog,..this really reminded of the film that i watched long back "Julie Julia",where a girl,Julie, regularly updates her blog on her culinary skills and waiting for the response from the great chef of all times,Julia.So,today i took the initiative to put something on my blog.Blogs are really helpful to keep you connected with memories and so I'd like to continue them until i can.

    Here we are at the last week of the month,August. Hoping for a Super September that will come sizzling all the way. 

Randomization

Today we discussed about randomization and its benefits!.They are very useful in writing down the System Verilog Testbench.We further learnt about randc Variables and its functions.We also had a brief discussion about task,function,private,public,protected.Few examples were explained with outputs and we soon got a clear idea about it. 

A LONG GAP....
 Its been a very long time since the last publish of my blog.A great Semester has passed and the results have come too..!! yet another step to finish up Graduation,The commencement of the advanced level in Vlsi has come up..Now We have reached the next level of our ADLD course...Its a good start with System Verilog,coming up is the CADENCE TOOL.
 It seems that Questa Sim is much more Similar to that of the CADENCE,and thus we have started our sessions with this software.As always assignments are given and we have started working in full speed.Hoping that this ADLV course goes on well just like ADLD.