End Of ADLD!..
Our last session came to an end with a good revision on all topics that we learnt so far!We ended up the sessions by submitting our all assignments.The course was very useful to us,and hope it continues in the advanced digital systems .The final exam is to be held on 27th of December;hope i put my best in it :) ..another joyful year is coming to an end!Joy to the world,the lord has come :) :)!!....merry Christmas to all...

Arbitration!
Today was our last session of IESA :(. Feeling sad,as we cover up the portions of this ADLD course.It was indeed a great fun ,filled with interest in learning this course.I really learnt new stuffs in the VLSI domain.Gonna miss these classes where programming was made very easy to us by our wonderful lecturer,Mr.Vamsi Chakradhar.Really gonna miss his classes from now on.Today we learnt about Arbitration and its types and we soon came up with codings for it.Later on,a recording was played on Guidelines that has to be followed to be good at coding.Tomorrow is our last day where we have decided to revise on the topics covered in this course,followed by the final Exam on 27th of December :( 

Magnitude Comparator!
Today's session started with a quick view on one bit Magnitude comparators!.We later on learnt the parity checker and parity generator and wrote coding on them at that instance.We started designing the SRAMs on the afternoon sessions which was made easy by the given lectures.Though it seemed difficult at the beginning it sooner became easy to design with few hints given to us by Vamsi sir.Our class dismissed today as we covered the SRAM topic.Hoping to learn something new again tomorrow too :)  

FSM and Memories
Today we listened and analyzed few points on both  Volatile and Non-Volatile memories.The recorded lecture was given by Mr.Srikanth Jadcherla sir,who pointed out the main architectures and operations in a simple manner.We earlier studied FSM and designed in Mealy and Moore types of FSM.Today's session was quite interesting and we had an overview of all the topics covered so far.We are yet to cover four topics that we will cover within Christmas.It was another good day that must be stored in our memories as we learnt the architecture of Memories !! :)

Sync Counters!
Today we learnt about Synchronous counters which a tricky part in the counter topic :) ..We later on  had a practical sessions on Mod Counters,Sync and Async counters;we solved many problems on Up and Down counters.Finally the session ended with a recap of FAQs.We also learnt about Ring and Johnson counters.Tomorrow we will be learning about FSM and its functions.So eagerly waiting to know about them :) 

Counters!
Today we learnt about Counters in detail and designed the counters accordingly.We also had a short recap on Shift registers and completed the designs on Shift registers.Tomorrow we'll be learning about Synchronous Counters in a detailed manner,as today's session dealt with the Asynchronous Counters.They seem to be difficult to analyze still the concepts of the Counters has to be known well!

Shift Registers!
 We begin our class with a recap on previous session about Flip Flops,where we learned about the differences between blocking and non-blocking;initial and always;continuous and procedural assignments.We then started the session with shift registers.It was an easy to study concept as we discussed these registers in a jiff, earlier.Later on,in the afternoon, we continued the session with practical assignments.In between we had a quick go through with the units that we have learnt so far!.It was an interesting session today.Tomorrow we are about to enter into the Counter Topics.Hoping for a good day tomorrow 

Flip Flops and Latches:
 Today we did a detailed study about the Flip flop and latches and its internal architecture.We learnt more about the excitation tables,characteristic equation and many.Later on in the afternoon session we had our practical classes where we were given assignments:an interesting set of questions where we gotta design according to the synchronous and asynchronous categories.Today was really an energetic class and we are yet to cover Shift registers in the upcoming classes !

Recap Session!
Today we had a recap session on Verilog and its basics.It was a good comeback filled with energy to learn once again the Very Large Scale Integration concepts.Later on,we had a practical session on the recap topics.Tomorrow we are moving on with the new concepts and are eager to learn them too! 

BACK WITH A BANG!!
  The ADLD courses resume tomorrow after a long gap in-between,where we had kept ourselves busy with semester examinations.So eagerly waiting for the courses to begin:A big booster on the way,to our brains.Looking forward to the classes where it goes on until Christmas.